The software workaround: 1) make sure that the Mach3 signal level is such that when there is no step, pin 5 of the TB6560 (named CLK in the datasheet) is low. 2) Use 1/2 step Sherline mode, with kernel running at 25 or 35 kHz. The effect of Sherline mode is that the pulse will stay high for the entire duration of the kernel cycle, and reset on the next cycle. 3) Set the Direction pulse timing to the maximum (15 us - note the GUI indicates 1 to 5 but it will accept up to 15). The net effect is a long pulse (40 us for 25 kHz kernel, 28.5 us for 35 kHz), with the limitation that the maximum pulse rate is reduced to one half of the kernel frequency. This is not a problem given the fact that in any case the TB6560 maximum allowable step frequency is only 15 kHz.
The hardware workaround: replace R4 to R9 with lower value (470 or 1k). This will make the rising edge sharper and gain some pulse width margin. You can't go too low with the value, otherwise the falling edge will become too slow, reducing the margin. You still need to make sure the Mach3 signal level is as in point 1 above. You can then either use Sherline mode as above, or normal mode. In the latter case, just make sure both step and direction timings are set to their maximum (15 us) and don't exceed 35 kHz (there is no point and all it will do is reduce your pulse times, this eating the margin).
There are many more subtle and less subtle problems with the board design. It really sucks, but with either workaround it can be made to at least operate without losing steps.
How do I accomplish step one in Mach3 or can it be done at all? Simple enough right... Thanks in advance.